Proactive Design for eXcellence process for High Speed Boards.

Purpose

Printed Wiring Boards used for High Speed Electronic Packaging are building blocks for high performance Communication equipment, are often product of contradicting performance requirements.

Implementation of a particular design requirement will have a direct impact on other related product performance parameters.

Electronic Product Packaging Steps are:
List mentioned here in but not entirely limited to:
o   Determining Interconnection levels.
o   Product life cycle management.
o   Relevance to technology roadmaps.
o   Advanced Packaging drivers.
o   Material and assembly cost drivers
o   Dfx Process

The list is endless, so at any given time a new meaningful Design requirement can make it to the prolonged process of design-review-redesign,
However any design reviews are intended towards

a.   Successful design of PWB
b.   Automated assembly of the PWB
c.    Performance of the finished PWB in the functional environment.
d.   Failure prevention, reliability

Though fixing review errors are multi disciplinary tasks.

Interconnecting and Packaging industry takes on Design for Process:

Industry fixed the design review process  by introducing
automated evaluation procedures, and many EDA vendors have built in DfX within CAD environment.

Certain DfX Checks are done online within CAD environment and fixed as and when it occurs.
However Design For Fabrication Checks are done by PCB CAM tools, and
Design For Assembly Checks are done by Assembly EMS process specialists.


The Checks are  done to evaluate :
Manufacturing Equipment compatibility, Steps to optimize process, recognize show-stoppers early, test ability, and design compatibility to enhance chances of “ build anywhere” trends.

Industry bodies like ITRS2, IPC and Inemi have published a lot of roadmaps, and process steps to aid DfX Process.

 

The roadmaps suggest ever evolving Advanced Packaging drivers.
Which include packaging cost, test cost,
Tighter System integration with shorted signal interconnection runs.
Ever increasing operating frequencies, which in turn call for severe constraints on signal integrity, power integrity and thermal budgets.

Also it is an industry observation that Moore’s law which was a guiding bellwether for Silicon Scaling is slowing down, but a highly inter discipline dependent packaging scale which is predominantly integration oriented, has emerged, and aptly called as “More than Moore”.

With More than Moore key focus is on system interconnection, integration
and assembly realization.

The issues which were earlier deemed as purely electrical or functional in
Nature will manifest as multi-physics in implementation.

It is prudent that these checks are done early in the design, as  errors caught at earlier stage of the design are less costlier compared to when caught at later stages of the product design.

The errors shall be fixed by concurrent approval of all stake holders like designers, board fabricators, and assembly houses  to arrive at a workable process plan to address errors reported.


An early interdisciplinary review results in:
        Faster Product development pace.
        End product immune to surprises, arising out of yield dips.
        DfX Process is one of the key tools available to keep in tune with
  technology development.
        Automated DfX exchange is executed as a key enabler in product
  Yield improvements
        Scope to Plough back findings into design constraints.


Thus IPC is ready with CFX (Connected Factory Exchange), which incorporates various review procedures of Design implementation, and technology transfer procedures.

Both standard and education programmes shall be available by the time the reader finishes assimilating gist of this article.

Let’s put our new designs through early Dfx checks and be ready to manufacture Electronic Products under IPC CFX.

Reference:

  • IPC India Apex 2016, held in Bangalore 21-23 SEP 2016.
  • www.ipc-cfx.org   
Author:
 
Mr. Amba Prasad, Product Architect, R&D, Tejas Networks Ltd.
 
 







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